Cadence hiring 2022, 2023 Batches For Design IP R&D Team at Cadence | Cadene Offcampus Drive 2023
| JOB | DETAILS |
|---|---|
| Company | Cadence |
| Role | IP Design Verification Intern |
| Batch | 2022, 2023 |
| Education | B.Tech/M.Tech (EE/EC/CS) |
| Salary | 4.8 LPA - 5.4 LPA |
| Experience | Not Required |
| Last Date | Apply Asap |
| Location | Bangalore / Noida |
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JOB DESCRIPTION
Excellent Opportunity for VLSI Trained Freshers to work with Design IP R&D Team at Cadence, Noida/Bangalore.
Position: IP Design Verification Intern (Multiple Positions)
Experience: 0 Years (Freshers from 2022 or 2023 batch)
Qualification: B.Tech/M.Tech (EE/EC/CS) with CGPA > 7/10
Mandatory Skills: Strong understanding of SV, UVM, C++/OOPS, and Digital Design concepts.
Salary: 4.8 - 5.4 LPA
Position: IP Design Verification Intern (Multiple Positions)
Experience: 0 Years (Freshers from 2022 or 2023 batch)
Qualification: B.Tech/M.Tech (EE/EC/CS) with CGPA > 7/10
Mandatory Skills: Strong understanding of SV, UVM, C++/OOPS, and Digital Design concepts.
Salary: 4.8 - 5.4 LPA
CLICK HERE TO APPLY or follow the below process
Send your resume to: cdn_dip_hiring@cadence.com with the Subject line: "Internship | B.Tech./M.Tech. EE/EC/CS | Year of Passing: 2022/2023 | Preferred Location: Noida/Bangalore"
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